The invention relates to a digital-to-analog converter and to a method for reducing harmonic distortion in a digital-to-analog converter.
Digital-to-analog (D/A) converters are used in a variety of applications for converting digital signals into corresponding analog signals. They are employed for example in base stations and in radio relay transmitters. The purity of the analog output signal is often of great significance for the performance of the application.
In current-steering D/A converters, the analog output signal is formed by connecting a number of current sources to a current output. In most of the applications, each current source is steered to one of two current outputs, resulting in a differential output signal current.
FIG. 1 shows as an example a segmented current steering 10-bit D/A converter with a 6-bit MSB (most significant bits) block formed of 63 unweighted current sources 1 and a 4-bit LSB (least significant bits) block formed of four binary-weighted current sources. To each current source there is assigned a differential switch pair S controlled by a current switch circuit and used to steer the respective current source to one of two current outputs OUT and XOUT. The four current sources of the LSB block output a one-, two-, four- and eight-fold predetermined current respectively if selected, thereby enabling an output of 8 different current values. Each of the current sources of the MSB block outputs a 16-fold predetermined current if selected. Each current source of the MSB block is responsible for a stepwise increase of the output current signal by a 16-fold predetermined current 16I when selected, thereby enabling an output of 64 different current values. The currents of the MSB and the LSB blocks are summed to form the output signal.
Today it is possible to design an integrated current steering D/A converter for sampling frequencies of up to several hundreds of megasamples per second with a resolution of up to 14 bit. However, with resolutions of 10 bit or more, the full resolution bandwidth is limited to several megahertz. In telecommunications applications a signal bandwidth of several megahertz is required.
The limiting factor for an effective resolution with high frequency signals is distortion. Timing errors and code dependency of the output impedance contribute to distortion. The most common cause of distortion, however, is asymmetrical glitches that occur during the state changes in the differential switches. If the resolution of a D/A converter is equal to or more than 10 bit, distortion starts to limit the dynamic linearity rapidly after some critical point of usually less than 10 MHz.
For illustration, FIG. 2 shows a simulated spectrum of the D/A converter of FIG. 1, the output voltage Vout being depicted over the frequency f/Hz of the outputted signal. The used sampling rate is 200 MHz and the signal frequency 20 MHz. Even though the output signal is differential, the even order harmonic components are high. The 2nd order harmonic limits the SFDR (spurious free dynamic range) to 53 dB. This illustrates that the differential output is not symmetrical in practice.
Attempts to improve the spectrum are known from the state of the art. Most published methods focus on decreasing the glitch energy in order to improve the spectral purity, but the 2nd harmonic component can still appear in the spectrum. Moreover, the 2nd harmonic usually dominates the distortion. Such methods are described for example in Analog Devices AD9754 Datasheet: xe2x80x9c14-bit, 125MSPS High Performance TxDAC D/A Converterxe2x80x9d, Analog Devices, Inc., 1999; J. Bastos, A. M. Marques, M. S. J. Steyaert, W. Sansen: xe2x80x9cA 12-bit Intrinsic Accuracy High-Speed CMOS DACxe2x80x9d, IEEE J. Solid-State Circuits, vol. 33, no. 12, December 1998, pp. 1959-1969; J. Vandenbussche, G. Van der Plas, A. Van den Bosch, W. Daems, G. Gielen, M. Steyaert, W. Sansen: xe2x80x9cA 14-bit 150 MSamples/s Update Rate Q2 Random walk CMOS DACxe2x80x9d, Proc. IEEE Int. Solid-State Circuits Conf., February 1999, pp. 146-147; and A. Van den Bosch, M. Borremans, J. Vandenbussche, G. Van der Plas, A. Marques, J. Bastos, M. Steyaert, G. Gielen, W. Sansen: xe2x80x9cA 12-bit 200 MHz Low Glitch CMOS D/A Converterxe2x80x9d, Proc. Custom Integrated Circuits Conference, 1998, pp. 249-252.
Another proposed possibility is to use track-and-hold circuitry in the output, as disclosed in A. R. Bugeja, B. -S. Song, P. L. Rakers, S. F. Gilling: xe2x80x9cA 14-bit 100 MSamples/s CMOS DAC Designed for Spectral Performancexe2x80x9d, Proc. IEEE Int. Solid-State Circuits Conference, February 1999, pp. 148-149 and A. Bugeja, B. -S. Song: xe2x80x9cA Self-Trimming 14b 100 MSample/s CMOS DACxe2x80x9d, Proc. IEEE Solid-State Circuits Conference, February 2000, pp. 44-45. The settled signal from the output is tracked so that the state change phase cannot be seen in the output signal. The usage of a track-and-hold circuit in the output increases the complexity of the D/A converter and the current consumption and is not very practical in mobile terminal units. In addition the speed of the system is limited by the sampling circuitry.
Finally, a few published solutions, like U.S. Pat. No. 6,031,477 and D. A. Mercer, L. Singer: xe2x80x9c12-bit 125MSPS CMOS D/A Designed For Spectral Performancexe2x80x9d, International Symposium on Low Power Electronics and Design, 1996, pp. 243-246, focus on improving the timing accuracy in the single current switch circuits. With these methods, however, there remains some finite signal frequency dependent distortion.
It is an object of the invention to reduce distortion in the output of a segmented current steering D/A converter.
The object is reached on the one hand by a digital-to-analog converter comprising a first and a second current output, at least two current sources, the currents of the current sources being summed to form an analog output signal, and assigned to each of the current sources a current switch circuit for connecting the respective current source to the first current output if the current source is selected according to a digital input signal and for connecting the respective current source to the second current output if the current source is not selected according to the digital input signal, each current switch circuit comprising means for creating two overlapping complementary control signals out of a signal indicating whether the current source is selected, while in a first group of the current switch circuits the connection of the respective current source to the first current output is controlled by the first one of the overlapping control signals and the connection of the current source to the second current output is controlled by the second one of the overlapping control signals, and while in a second group of the current switch circuits the connection of the respective current source to the first current output is controlled by the second one of the overlapping control signals and the connection of the current source to the second current output is controlled by the first one of the overlapping control signals, each of the current switch circuits of the second group comprising in addition means for inverting the signal input to the means for creating two overlapping complementary control signals.
On the other hand, the object is reached by a method for reducing harmonic distortion in a digital-to-analog converter comprising a first and a second current output, at least two current sources, the currents of the current sources being summed up to form an analog output signal, and assigned to each of the current sources a current switch circuit for connecting the respective current source to the first current output if the current source is selected according to a digital input signal and for connecting the respective current source to the second current output if the current source is not selected according to the digital input signal, the method comprising
creating for each current source of a first group of current sources two overlapping control signals based on a signal indicating whether the respective current source is selected, and using the first of said overlapping control signals for controlling the connection of the current source to the first current output and the second of said overlapping control signals for controlling the connection of the current source to the second current output; and
creating for each current source of a second group of current sources two overlapping control signals based on a signal which is inverted compared to the signal indicating whether the respective current source is selected, and using the first of said overlapping control signals for controlling the connection of the current source to the second current output and the second of said control signals for controlling the connection of the current source to the first current output.
According to the invention, a certain number of current switch circuits assigned to the current sources of a D/A converter is divided into two groups. The first group switches the respective current source to a first or a second current output conventionally. To this end, the current switch circuits create overlapping control signals out of an information indicating whether the current source is presently selected. The current switch circuits of the second group, however, are modified. The connection of the outputs of the means for creating overlapping signals to the actual switching means is switched. Additionally, the signal entering the means for creating overlapping signals is inverted. As a result, the connections between the current source and the first and the second current output are controlled with signals of the same state as if a current switching circuit of the first group were employed, when disregarding the overlaps. The asymmetry of the overlaps, however, is changed.
Since part of the state changes now occur in a complementary way as compared to the other part of the state changes, the asymmetrical glitches occurring during the state changes in the switches are compensated in the summed up analog output signal. This means that the distortion caused by the pulse relation errors in the control signals spreads to the noise floor or at least decreases significantly.
It is an advantage of the invention that is does not necessitate an increase in the current consumption. Nor is the circuit complexity increased, since only an inverter has to be added to realize the modified current switch cells. Another significant advantage is given by the fact that there is no signal frequency dependency of the compensation according to the invention.
Preferred embodiments of the invention become apparent from the subclaims.
Many D/A converters comprise weighted, in particular binary-weighted, current sources for converting the least significant bits (LSB) of a digital signal and unweighted current sources for converting the most significant bits (MSB) of a digital signal. In such a converter it is preferred that only the current switch circuits assigned to the unweighted current sources are divided into two groups for a complementary controlling of the connection of the current sources to a first and a second current output. The weighted current sources are controlled conventionally, because they have different impacts on the resulting asymmetry.
Preferably, the two groups of current switch circuits are basically of equal size in order to achieve an optimal compensation.
In an advantageous embodiment of the invention, two parallel arrays of current sources are employed. These two arrays are used simultaneously, i.e. with each change of state (at least) one current source of each array is switched at the same time. The current switch circuits assigned to the current sources of the first array all belong to the first group, the current switch circuits assigned to the current sources of the second array all belong to the second group of current switch circuits. Accordingly, in every switch transition both a modified and an unmodified cell switches at the same time. This leads to an even better compensation of the asymmetries, since the compensation takes place immediately and exactly matched with each switch and since an uneven distribution of carried out switches is irrelevant in this implementation. Moreover, this embodiment of the invention is also suitable for including the weighted current sources in the compensation, since the asymmetries caused by the switching of a current source in the first array are always compensated by the switching of an equal current source of the second array.
The digital-to-analog converter and the method according to the invention are especially suited to be used in base stations and radio relay transmitters.